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Full-rate bang-bang phase detectors (BBPDs) and bang-bang frequency detectors (FDs) are presented for continuous-rate clock and data recovery (CDR) circuits. The proposed BBPDs have only six latches, so they save the power and area. Their symmetric architecture minimizes the clock skew caused by the nonsymmetric layout. The proposed unilateral FDs have a wide detectable frequency range. The theoretical analysis for the proposed FDs is given. Two continuous-rate CDR circuits using the proposed BBPDs and FDs have been fabricated in a 0.18-mum CMOS process. They recover the NRZ data of a 231-1 PRBS from 622 Mbps to 3.125 Gbps. All of the measured bit error rates are less than 10-12.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:55 , Issue: 12 )
Date of Publication: Dec. 2008