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We have developed and employed an automated multi-scale modeling approach to investigate thermal issues in analog integrated circuits (ICs) and to enable ldquothermally awarerdquo design thereof. Thermal analysis from full-chip scale down to the single transistor level was made possible with this approach utilizing the finite volume three-dimensional (3D) numerical technique. We have developed new methods and tools that import GDSII layout of entire IC and generate 3D model. The tool provides a 3D temperature map that can show thermal gradients across a chip, as well as local temperature distribution (hot spots) down to single transistor level. This allows introducing temperature back into design process. Our method and tools are demonstrated on a couple of radio-frequency (RF) chips. The multiscale modeling has been verified with infrared temperature measurements.