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In this paper, an analytical model for gate tunneling current has been deployed by solving Schrodinger equation using Wentzel-Kramer-Brillouin (WKB) approximation method for trapezoidal potential barrier. The gate tunneling current has been computed for direct tunneling from channel to gate as well as for tunneling from source drain extension (SDE) region to gate. Effect of temperature variation on gate tunneling current with SiO2 thickness of 4 nm to 1 nm range has been studied at various gate voltages. To study the effect of temperature on gate tunneling current, the related parameters have been modeled based on physics. Effect of variation of substrate doping concentration (Na) on gate tunneling current in n-MOSFET has also been studied. These studies have been used to bring out the design margins available in equivalent oxide thickness (EOT) and Na.