PVT-tolerant and supply noise tracking word-line under-drive circuit, PMOS pass device, and dynamic voltage collapse enable read and write stable diffusion-notch-free (DNF) 6T SRAM cells. Measurements from a 45-nm test-chip show 26X reduction in number of single bit failures using those schemes.
Published in:
VLSI Circuits, 2008 IEEE Symposium on
Date of Conference: 18-20 June 2008