We propose a novel approach to engineering floating gates (FGs) of flash memory cells, namely, carbon incorporation into polysilicon FGs. This technique demonstrated an improvement in retention and a larger program/erase Vt window, particularly for smaller capacitance coupling ratio cells, which is important for future scaled flash memory cells.
Published in:
Electron Device Letters, IEEE
(Volume:29
,
Issue:
7
)
Date of Publication: July 2008