Extensible Modular Design and Implementation of Hybrid Packet Schedulers

In this paper we propose design principles for implementation of hybrid packet schedulers with parallel and pipelined hardware architecture. Packet schedulers are the algorithms used to schedule variable-sized packets from large number of distinct traffic flows, sharing a single network link. Hybrid schedulers are intended to achieve constant deviation from ideal general processor sharing (GPS) scheduler and constant computational complexity per single packet transmission. While theoretical properties of hybrid algorithms have been studied well, their practical implementation had not been addressed yet. This paper describes an approach to create a generic framework, suitable for efficient implementation of hybrid schedulers. We introduce a concept of an atomic scheduling object, called a scheduling queue (SQ), and demonstrate how a hybrid scheduler can be constructed as a set of interacting SQs. We also present experimental results obtained on a prototype system.