A compensation method against a threshold-voltage (Vth) variation using tunneling magnetoresistive (TMR) devices, is proposed for a deep-submicron VLSI. The influence of the Vth variation in a single MOS transistor can be neglected by adjusting the source voltage of the MOS transistor. The desired circuit behavior is obtained by programming the resistance value of a TMR device which is connected to the MOS transistor in series. By using HSPICE simulation under a 90nm CMOS technology, it is demonstrated that a radix-2 signed-digit adder using the proposed method is robust against the Vth variation.
Published in:
Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on
Date of Conference: 22-24 May 2008