Cart (Loading....) | Create Account
Close category search window
 

Design of High-Performance Quaternary Adders Based on Output-Generator Sharing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Shirahama, H. ; Res. Inst. of Electr. Commun., Tohoku Univ., Sendai ; Hanyu, T.

Simple implementations of quaternary full adders are proposed for a high-performance multi-processor which consists of many processing elements (PEs). Arbitrary quaternary functions are represented by the combination of input-value conversion and several quaternary output generations. The use of appropriate input-value conversion makes it possible to reduce the number of output generators, which improves the performance of the resulting quaternary full adders. For example, two kinds of single PEs including a quaternary full adder and two flip-flops are implemented using the proposed method and their efficiencies are demonstrated in terms of delay and power dissipation in comparison with those of a corresponding binary CMOS implementation.

Published in:

Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on

Date of Conference:

22-24 May 2008

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.