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A new method to achieve highly linear scaling of differential currents in CMOS technology is presented. It is based on operation in weak or moderate inversion of FGMOS transistors, and features performance improvements over previous proposals aimed to the same goal, like reduced supply voltage requirements, increased power efficiency, and avoidance of bulk effect. Measurement results of a 0.5 mum CMOS technology are presented that verify the proposed approach.
Date of Conference: 27-30 Aug. 2007