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Accelerating Assertion Coverage With Adaptive Testbenches

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4 Author(s)
Pal, B. ; Indian Inst. of Technol., Kharagpur ; Banerjee, A. ; Sinha, A. ; Dasgupta, P.

We present a new approach to bias random test generation for accelerating assertion coverage. The novelty of the proposed approach is that it treats the design under test as a black box and attempts to steer the simulation toward coverage points that are relevant for targeted assertions purely through external control. We present this approach over three different models with varying degrees of observability and control. The results demonstrate a significant speedup in assertion coverage as compared to randomized simulation.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:27 ,  Issue: 5 )

Date of Publication:

May 2008

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