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Tutorial 1: The Promise of High-k/Metal Gates-From Electronic Transport Phenomena to Emerging Device/Circuit Applications

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1 Author(s)
K. Maitra ; AMD, Sunnyvale

Summary form only given. Recent advancements of gate stack engineering have enabled the introduction of high-k/metal gates into mainstream CMOS device applications for 45 nm and beyond technology space. In this talk, we take a critical look back into the key steps which made this possible with primary focus on transport phenomena in transistors in presence of high-k/metal gates. Against this backdrop, the interaction of high-k/metal gates with end of roadmap devices would be thoroughly explored. High-k/metal gates have interesting ramifications in the circuit space-from NBTI (negative bias temperature instability) to high-field mobility, the high-k gate induced physical phenomena and their impact on device and circuit performance and reliability would be discussed. To conclude, this talk would also conjecture on the continued scalability of high-k gate stacks for futuristic CMOS device architectures.

Published in:

9th International Symposium on Quality Electronic Design (isqed 2008)

Date of Conference:

17-19 March 2008