By Topic

A Novel BPSK Demodulator for Biological Implants

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Zhenying Luo ; RF Micro Devices Inc., Billerica, MA ; Sonkusale, S.

A novel binary phase-shift keying (BPSK) demodulator architecture is presented. The design employs a phase frequency detector based phase-locked loop allowing for robust performance compared to prior art. Two different circuit implementations for the novel demodulator architecture are proposed. Based on theoretical analysis, the maximum data rate of the demodulator is derived to be 1/8th of the carrier frequency. For experimental validation, a prototype was implemented for a 13.56-MHz BPSK demodulator in a 0.5-mum CMOS technology. The circuit occupies 1 mm2 chip area and consumes 3-mW power without any circuit optimization and can be further improved. Bit-error rate measurements have also been presented for a 20-kbs data rate.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:55 ,  Issue: 6 )