Cart (Loading....) | Create Account
Close category search window
 

A Heterogeneous 16-Bit DAC Using a Replica Compensation

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Dongwon Seo ; Qualcomm Inc., San Diego, CA

A highly monotonic very low power 16-bit 2-MS/s digital-to-analog converter (DAC) for high-resolution control loop systems is proposed and demonstrated. Replica compensation is used in improving the monotonicity of a heterogeneous DAC composed of a coarse current steering DAC and a fine resistor-ladder DAC. A complete DAC, including an on-chip bandgap reference and an output buffer, consumes only 0.6 mA with a 2.7-V supply. The 2.19-mm2 DAC with 10-I/O bonding pads implemented in 0.18-mum Bi-CMOS process achieves plusmn0.8 least significant bit (LSB) differential nonlinearity, plusmn4 LSB integral nonlinearity, and plusmn3-mV offset error at 2-MS/s sample rate.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:55 ,  Issue: 6 )

Date of Publication:

July 2008

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.