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Advanced CMOS engineering strongly requires materials science-based technology in addition to (rather than) demonstrating exotic non-planar device structures and/or various smart integration techniques. This paper describes typical examples of materials-related device engineering in metal gate/high-k CMOS developments, focusing on basic issues such as EOT scalability with higher-k, an inversion layer mobility degradation mechanism and the VTH tuning principle. These considerations will be key to designing high performance CMOS.
Date of Conference: 10-12 Dec. 2007