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A microarchitecture of clustered superscalar processor

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3 Author(s)
Yang Bing ; Harbin Inst. of Technol., Harbin ; Mao Zhigang ; Gan Chuhui

Superscalar processor requires many of high ports and large on-chip structures to extract ILP in applications. And those components are often laid on the critical path, consume huge power and limit the scalability of superscalar. Clustered microarchitecture is an attractive alternative to large monolithic superscalar designs due to their potential for dealing with many problems faced in modern microprocessor design. In this paper, a microarchitecture of clustered superscalar processor with distributed rename, issue, registerfile, execute, and commit logic is proposed and described in detail.

Published in:

ASIC, 2007. ASICON '07. 7th International Conference on

Date of Conference:

22-25 Oct. 2007