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A 3-D electrical finite-element model (FEM) for the design of an ultra-low on-state resistance power MOSFET device is presented. Model building and layer conductivity are discussed to take into account microscopic, technological, and electrical effects, such as metal step coverage and MOS behavior of each elementary cell of the transistor. Model simplifications are also presented to ensure time-efficient simulations. FEM gauging is then achieved, by comparing simulation results to electrical measurements, on devices subjected to top metallization debiasing effects. Simulations show a good agreement with measurements for result errors at less than 2%. The aim of this paper is to provide an accurate estimation of the contribution of parasitic elements such as the shape and number of power bonding wires or top metallization thickness to power device on-state resistance (RON). The 3-D electrical FEM is a mandatory first step towards an accurate electrothermal FEM for the design of efficient power products.