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Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

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24 Author(s)

A full ULK (ultra low-k) integration using TFHM (trench first hard mask) architecture (Hinsiger et al., 2004) is demonstrated in a high density CMOS 45 nm device. 13 nm-pitch metal features have been resolved using a 193 nm immersion hyper-NA (numerical aperture) scanner and an optimized OPC (optical proximity correction) model. RC performance and yield results are presented for a fully-integrated 45 nm ULK backend. An overall speed performance enhancement of >10% has been confirmed within a microprocessor application at the 65 nm technology node when replacing Low-k dielectric (k=2.9) with ULK (k=2.5) material.

Published in:

VLSI Technology, 2007 IEEE Symposium on

Date of Conference:

12-14 June 2007