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Design Models of Pipelined Units for Digital Signal Processing

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4 Author(s)
Iryna Hahanova ; DAD Department, Kharkiv National University of Radio Electronics (KNURE), 14, Lenina ave, Kharkiv, 61166, UKRAINE. E-mail: ; Yaroslav Miroshnychenko ; Irina Pobegenko ; Oleksandr Savvutin

In this paper the architectural models of pipelined computing units with system-level description, those essentially decrease the design cycle for digital signal processing products, are offered. Practical realization of the filter, that confirms developed design flow effectiveness with software products Simulink (Mathlab) and Active HDL, Aldec Inc., is given.

Published in:

CAD Systems in Microelectronics, 2007. CADSM '07. 9th International Conference - The Experience of Designing and Applications of

Date of Conference:

19-24 Feb. 2007