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Modern FM radio receiver on portable devices requires low power consumption, small size and good audio performance. This paper reports a highly integrated FM radio single-chip receiver optimized for low power consumption and minimum external components. The operating frequency is 76 MHz ~ 108 MHz which covers EURO/US/Japan FM bands. The chip integrates all essential RF front-end circuits including LNA and mixer with automatic gain control (AGC), and mixed-signal functional blocks such as channel filter, limiting amplifier, integrated FM demodulator, stereo decoder, and integrated frequency locked loop (FLL). The total current consumption is only 10 mA off 2.8 V while maintaining sensitivity as low as 1.1 μV. The audio signal-to-noise ratio (SNR) is 58 dB. Total harmonic distortion (THD) is less than 0.4 % and the stereo audio separation (SEP) is more than 30 dB. This chip is fabricated in 0.35 μm BiCMOS process and packaged in 28-pin 4×4 mm2 LGA.