VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System

This paper presents a VLSI implementation of a high throughput MIMO-OFDM system in wireless communications. We explore the optimum parameters in a new packet OFDM frame by expanding the IEEE802.11a standard. The proposed system provides a maximum of 600 Mbps by use of an 80-MHz baseband bandwidth and a 2 times 2 MIMO scheme. The proposed system is implemented into hardware according to a full-pipelined architecture. In the MIMO detection circuit, we adopt a low latency architecture to satisfy the timing constraint required for real-time MIMO detection. In a 90-nm CMOS technology, the system performing MMSE-V-BLAST detection has 3.9 millions in logic gates and consumes 584 mW in power dissipation