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The paper discuses a new approach for designing self-checking sequential circuits with smooth power dissipation The proposed approach enables achievement of circuits with a lower overhead. At the same time it provides for circuits a specific property to have approximately the same power dissipation on all codewords. A new architecture of the self-checking sequential circuit with smooth power dissipation is proposed. The architecture is investigated on a number of standard benchmarks.
Date of Conference: Nov. 2006