System Maintenance:
There may be intermittent impact on performance while updates are in progress. We apologize for the inconvenience.
By Topic

A 2.7mW 2MHz Continuous-Time ΣΔ Modulator with a Hybrid Active-Passive Loop Filter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Tongyu Song ; Dept. of Electr. & Comput. Eng., Texas Univ. - Austin, Austin, TX ; Zhiheng Cao ; Shouli Yan

We present a 5th -order continuous-time SigmaDelta modulator with a hybrid active-passive loop filter consisting of only three amplifiers. The passive integrators save power, and introduce no distortion. The active integrators provide gain and minimize internal noise contributions. A single-bit switched-capacitor DAC is employed as the main feedback DAC for high clock jitter immunity. An additional current steering DAC stabilizes the loop with the advantage of simplicity. To verify the proposed techniques, a prototype continuous-time ΣΔ modulator with 2 MHz signal bandwidth is designed in a 0.25 μm CMOS technology targeting for GPS or WCDMA applications. The experimental results show that the prototype ΣΔ modulator achieves 68 dB dynamic range over 2 MHz bandwidth with a 150 MHz clock, consuming 1.8 mA from a 1.5 V supply.

Published in:

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Date of Conference:

10-13 Sept. 2006