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Calculation of Mean Shift for a Binary Multiplier Using 2, 3, or 4 Bits at a Time

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1 Author(s)
Freeman, Herbert ; Dept. of Elec. Engrg., New York University, Bronx, N. Y.

Binary multiplication can be speeded up by taking two or more bits of the multiplier at a time. This note describes an exact method, based on the use of a discrete-time, finite-state system model, for calculating the gain in multiplication speed resulting from such a scheme. It is shown that the gain in speed is less than what had previously been obtained using an approximation formula.

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Electronic Computers, IEEE Transactions on  (Volume:EC-16 ,  Issue: 6 )