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Design Trade-offs for Low-power and High Figure-of-merit LNA

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5 Author(s)
Hsien-Ku Chen ; Nat. Appl. Res. Labs., National Chip Implementation Center, Hsinchu ; Sha, J.R. ; Da-Chiang Chang ; Juang, Y.-Z.
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We report a 5.4 mW ultra low dc power low noise amplifier (LNA) at 5.5 GHz, which is based on a 0.35-mum BiCMOS technology. The trade-off between the NF and linearity for LNA circuit design has been investigated. Furthermore, the usage of the HBT-cascade-MOS methodology is simultaneously satisfied the tradeoff between noise figure (NF) and linearity of LNA. This amplifier achieves a gain/(NF times PDC ) ratio figure of merit of 0.774 (1/mW) which is the better reported at 5~6-GHz band and suitable for wireless LAN applications

Published in:
VLSI Design, Automation and Test, 2006 International Symposium on

Date of Conference: 26-28 April 2006

Page(s):
1 - 4
E-ISBN :
1-4244-0180-1
Print ISBN:
1-4244-0179-8
INSPEC Accession Number:
9122754
Conference Location :
Hsinchu
Digital Object Identifier :
10.1109/VDAT.2006.258117
Product Type:
Conference Publications

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