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A fault tolerant system configuration based on error correcting codes

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3 Author(s)
Hirasawa, S. ; Dept. of Ind. Eng. & Manage., Waseda Univ., Tokyo, Japan ; Kohnosu, T. ; Nishijima, T.

A fault tolerant system configuration composed of multiple computers is discussed. We propose a new error correction procedure based on the theory of error correcting codes and information theory. We assume that the system is composed of J computers, and each computer, N modules, where the word-length of the computer is w bits. Each module has a m bits memory and w bits CPU. We also assume that each computer is loosely coupled to the other computers, while each module is tightly coupled to the other modules in each computer. Then we introduce an (N, K) code over GF(2m) in each computer, where w=mK. The proposed system is able to construct a (JN, K) code over GF(2m) by combining J computers which consist of JN modules. If at least one computer detects errors, then the (JN, K) code is decoded to correct errors. Thus the proposed system can increase the error correcting capability and errors which result in only detecting errors or decoding errors for the conventional system can be corrected, where the conventional system is assumed to be the L out of J system. Comparing the proposed system with the conventional system, we show that the performance of the former is superior than that of the latter

Published in:

Systems, Man, and Cybernetics, 1994. Humans, Information and Technology., 1994 IEEE International Conference on  (Volume:3 )

Date of Conference:

2-5 Oct 1994