Cart (Loading....) | Create Account
Close category search window
 

VLSI implementation for HVRI algorithm in pattern recognition

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Tang, Y. ; Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada ; Tao Li ; Lee, S.-W.

A VLSI architecture to implement the horizontal- vertical region integration (HVRI) algorithm has been designed. The HVRI algorithm transforms a multi-contour pattern into a unique outer contour. It is applicable to a wide range of areas such as image analysis, pattern recognition, etc. A linear array has been designed based on a canonical methodology which maps homogeneous dependence graphs into processor arrays. An N/2-element vector is used to process a pattern with a size of N×N. It can speed up the recognition process considerably with a time complexity of O(N) compared with O(N2) when a uniprocessor is used

Published in:

Document Analysis and Recognition, 1993., Proceedings of the Second International Conference on

Date of Conference:

20-22 Oct 1993

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.