Referenced Items are not available for this document.
A built-in self test (BIST) approach wherein the on-chip test pattern generator is basically the combination of a LFSR, on OR2 network and a set of multiplexers is described. Given precomputed sequences of deterministic test vectors, it is illustrated by some examples that this LFSROM generator provides data storage performances comparable in quality to a ROM
Published in:
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Date of Conference: 22-25 Feb 1993
- Page(s):
- 211 - 216
- Meeting Date :
- 22 Feb 1993-25 Feb 1993
- Print ISBN:
- 0-8186-3410-3
- INSPEC Accession Number:
- 4885172
- Conference Location :
- Paris
- Digital Object Identifier :
- 10.1109/EDAC.1993.386474
- Product Type:
- Conference Publications
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