Referenced Items are not available for this document.
A logic simulation approach suitable to get information about the dissipated power of a system without the need of a specific current simulation is described. With this approach it is possible to retrieve estimations for average power dissipation under typical operating conditions. Furthermore a mapping approach which performs a power-minimal mapping for a given CMOS combinational circuit structure is suggested
Published in:
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Date of Conference: 22-25 Feb 1993
- Page(s):
- 341 - 346
- Meeting Date :
- 22 Feb 1993-25 Feb 1993
- Print ISBN:
- 0-8186-3410-3
- INSPEC Accession Number:
- 4885194
- Conference Location :
- Paris
- Digital Object Identifier :
- 10.1109/EDAC.1993.386452
- Product Type:
- Conference Publications
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