By Topic

Cross-talk extraction from mask layout

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Sicard, E. ; INSAS-DGE, Toulouse, France ; Demonchaux, T. ; Noullet, J.L. ; Rubio, A.

The principles of an automated cross-talk extractor from the mask-level description of a CMOS integrated circuit are detailed. The physical extraction principles, the techniques for parasitic coupling evaluation and modeling, the technique for back-annotating the schematic diagram of the integrated circuit are presented. A model for mixed-level simulation is proposed, covering various parasitic effects of the cross-talk phenomenon. The efficiency of the cross-talk extractor is demonstrated through the analysis of mixed digital/analog CMOS integrated circuits where critical couplings are predicted and eliminated

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993