Referenced Items are not available for this document.
A design methodology that accomplishes fast design cycles for complex VLSI circuits and maintains a high level of integration and performance is presented. A configurable RISC microprocessor is the system core. Flexible and regular cells are used to automatically generate digital and analog hardware blocks. Together with this pick-and-place design methodology of the system architecture, a high-level development system leads to shortened design times
Published in:
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Date of Conference: 22-25 Feb 1993
- Page(s):
- 532 - 535
- Meeting Date :
- 22 Feb 1993-25 Feb 1993
- Print ISBN:
- 0-8186-3410-3
- INSPEC Accession Number:
- 4885226
- Conference Location :
- Paris
- Digital Object Identifier :
- 10.1109/EDAC.1993.386421
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