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Module selection and scheduling using unrestricted libraries

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4 Author(s)
Timmer, A.H. ; Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands ; Heijligers, M.J.M. ; Stok, L. ; Jess, J.A.G.

Most high-level synthesis schedulers are capable only of mapping an operation to one specific module type. To ensure a full design space exploration, a synthesis system should however select freely from a library containing modules with a large variety in delay, area and so on. A module selection and scheduling approach which allows the full use of such unrestricted libraries is presented. Extensive benchmark results show very fast running times and optimal solutions. This approach clearly illustrates the advantages of synthesis tools which can fully cope with unrestricted libraries, as they lead to designs with less module area

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993