Referenced Items are not available for this document.
A programmable 24-bit RISC-based Digital Signal Processor with oversampled ADC and DAC has been designed in 1.2 μm CMOS for use in a service adaptive subscriber loop interface. The processor has an instruction rate of 20.48 MHz and can perform most of the signal processing requirements for many services ranging from POTS to ISDN-U
Published in:
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Date of Conference: 1-4 May 1994
- Page(s):
- 219 - 222
- Meeting Date :
- 01 May 1994-04 May 1994
- Print ISBN:
- 0-7803-1886-2
- INSPEC Accession Number:
- 4903528
- Conference Location :
- San Diego, CA
- Digital Object Identifier :
- 10.1109/CICC.1994.379732
- Product Type:
- Conference Publications
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