Referenced Items are not available for this document.
A circuit technique to reduce threshold voltage fluctuation by a use of self-substrate-bias is introduced. The substrate bias is controlled so that leakage current of a representative MOSFET is adjusted constant with a feedback loop. The threshold voltage can be controlled within ±0.05 V and the speed gains under 1.5 V and 1V VDD are estimated to be a factor of 1.3 and 3, respectively. A test chip is fabricated and effectiveness of the scheme is investigated
Published in:
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Date of Conference: 1-4 May 1994
- Page(s):
- 271 - 274
- Meeting Date :
- 01 May 1994-04 May 1994
- Print ISBN:
- 0-7803-1886-2
- INSPEC Accession Number:
- 4910149
- Conference Location :
- San Diego, CA
- Digital Object Identifier :
- 10.1109/CICC.1994.379721
- Product Type:
- Conference Publications
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