An ASIC interfacing 4 micromachined accelerometers has been designed and integrated in a 2 μm technology and has a size of 55 mm 2. It consumes 300 μA at 3 V, has a resolution of 11 bits and a programmable bandwidth of 16 Hz to 200 Hz. Low power operation has been obtained by the introduction of a sleep mode with rapid wake up. The chip has been designed to allow testability without sensor
Published in:
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Date of Conference: 1-4 May 1994