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Hardware starting approximation for the square root operation

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2 Author(s)
Schwarz, E.M. ; IBM Enterprise Syst., Poughkeepsie, NY, USA ; Flynn, M.

A method for obtaining high-precision approximations of high-order arithmetic operations is presented. These approximations provide an accurate starting approximation for high-precision iterative algorithms, which translates into few iterations and a short overall latency. The method uses a partial product array to describe an approximation and sums the array on an existing multiplier. By reusing a multiplier the amount of dedicated hardware is made very small. For the square-root operation, a 16-bit approximation costs less than 1000 dedicated logic gates to implement and has the latency of approximately one multiplication. This is 1/500 the size of an equivalent look-up table method and over twice as many bits of accuracy as an equivalent polynomial method. Thus, a high-precision approximation of the square root operation and many other high-order arithmetic operations is possible at low cost

Published in:

Computer Arithmetic, 1993. Proceedings., 11th Symposium on

Date of Conference:

29 Jun-2 Jul 1993