By Topic

Implementation of arithmetic algorithms using a PLA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Abe, K. ; Dept. of Comput. Sci. & Inf. Math., Univ. of Electro-Commun., Tokyo, Japan ; Iijima, J. ; Nakashima, T. ; Wakatsuki, Y.

A programmable logic array (PLA) was designed that is capable of implementing 24 logic functions each with 48 product terms of 16 variables. The PLA is composed of two diode matrices, and is programmed by inserting short plugs. Implementation of arithmetic algorithms in a laboratory course dealing with computer hardware has successfully been performed using the PLA to organize a finite-state machine (FSM) controlling a data path. Both the data path and the PLA were incorporated into a panel on which the data flow and the states and outputs of the FSM are made visible by light-emitting diodes. This helps students understand the algorithms and debug the implementation.

Published in:

Education, IEEE Transactions on  (Volume:32 ,  Issue: 3 )