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A low-power chipset for a portable multimedia I/O terminal

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3 Author(s)
Chandrakasan, A.P. ; Dept. of Electr. Eng., MIT, Cambridge, MA, USA ; Burstein, A. ; Brodersen, R.W.

This paper presents the design of a low-power chipset for a portable multimedia terminal that supports pen input, speech I/O, text/graphics output, and one-way full-motion video. Its power consumption was minimized using an approach that involves optimization at all levels of the design, including extended voltage scaling, reduced swing logic, and switched capacitance reduction through operation reduction, choice of number representation, exploitation of signal correlations, self-timing to eliminate glitching, logic design, circuit design, and physical design. The entire chipset, which performs protocol conversion, synchronization, error correction, packetization, buffering, video decompression, and D/A conversion, is implemented in 1.2 μm CMOS and operates from a 1.1 V supply while consuming less than 5 mW

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:29 ,  Issue: 12 )