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An experimental active-memory-based network element

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3 Author(s)
A. Asthana ; AT&T Bell Labs., Murray Hill, NJ, USA ; M. Cravatts ; P. Krzyzanowski

We describe a network element based on an active memory named SWIM (Structured Wafer-based Intelligent Memory), designed for efficient storage and manipulation of data structures. The key architectural idea in SWIM is to put some processing logic inside each memory chip that allows it to perform data manipulation operations locally and to interact with a disk or a communication line through a backend port. The processing logic is specially designed to perform operations such as pointer dereferencing, memory indirection, searching and bounds checking efficiently. The network element is built using an interconnected ensemble of such memory logic pairs. A complex processing task can now be distributed between a large number of small memory processors each doing a sub-task, while still retaining a common locus of control in the host CPU for higher level administrative and provisioning functions. We argue that active memory based processing enables more powerful, scalable and robust designs for storage and communications subsystems, that can support emerging network services, multimedia workstations and wireless PCS systems. A complete parallel hardware and software system constructed using an array of SWIM elements has been operational for over a year

Published in:

High Performance Distributed Computing, 1994., Proceedings of the Third IEEE International Symposium on

Date of Conference:

2-5 Aug 1994