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Optically augmented 3-D computer: technology and architecture

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4 Author(s)
P. J. Marchand ; California Univ., San Diego, La Jolla, CA, USA ; A. V. Krishnamoorthy ; S. C. Esener ; U. Efron

In order to achieve high performance parallel computing in terms of bandwidth versus power consumption and volume, denser and faster means of implementing interconnections while minimizing power and crosstalk are required. Global interconnections can be implemented using free-space interconnect technology and can be coupled to the wafer to wafer connection system developed at Hughes Research laboratories to obtain an optoelectronic 3-D computer with increased throughputs for routing or sorting operations. To this end, the 3-D optoelectronic computing architecture needs to be designed for optimal performance, light transmitters and receivers need to be integrated with the 3-D VLSI wafer stacks to allow optical inputs and outputs, and free-space optical interconnect elements need to be assembled with the modified 3-D wafer stacks. In the paper, the underlying concepts of the technology and architecture of the optically augmented 3-D computer are evaluated

Published in:

Massively Parallel Processing Using Optical Interconnections, 1994., Proceedings of the First International Workshop on

Date of Conference:

26-27 Apr 1994