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A functional approach to delay faults test generation for sequential circuits

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3 Author(s)
F. Fummi ; Dipartimento di Elettronica, Politecnico di Milano, Italy ; D. Sciuto ; M. Serra

In this paper we present an analysis of the coverage of delay faults in sequential circuits by a functional test pattern generator. Relationships are investigated between a functional fault model and delay faults, with correlations to the stuck-at fault coverage. Undetected faults are identified and an algorithm to improve the delay fault coverage is proposed. The final approach generates a functional test for sequential circuits with optimization and reaches complete coverage of detectable delay faults with short tests

Published in:

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Date of Conference:

28 Feb-3 Mar 1994