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Memory management for dataflow programming of multirate signal processing algorithms

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2 Author(s)
Bhattacharyya, S.S. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Lee, E.A.

Managing the buffering of data along arcs is a critical part of compiling a synchronous dataflow (SDF) program. This paper shows how dataflow properties can be analyzed at compile-time to make buffering more efficient. Since the target code corresponding to each node of an SDF graph is normally obtained from a hand-optimized library of predefined blocks, the efficiency of data transfer between blocks is often the limiting factor in how closely an SDF compiler can approximate meticulous manual coding. Furthermore, in the presence of large sample-rate changes, straightforward buffering techniques ran quickly exhaust limited on-chip data memory, necessitating the use of slower external memory. The techniques presented in this paper address both of these problems in a unified manner

Published in:

Signal Processing, IEEE Transactions on  (Volume:42 ,  Issue: 5 )

Date of Publication:

May 1994

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