By Topic

CMOS magnetic sensor arrays

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
J. J. Clark ; Div. of Appl. Sci., Harvard Univ., Cambridge, MA, USA

The design of a monolithic 64*64-element array of magnetic sensors, which is implemented in a standard 3- mu m CMOS process, is described. The individual magnetic field sensors are split-drain MAGFETS. A split-drain MAGFET is a field-effect transistor that has one source, one gate, and two drains. When current is flowing in the FET in the absence of a magnetic field, both drains receive an equal current. If a magnetic field is present with a component perpendicular to the direction of current flow, the current flow is deflected towards one drain and away from the other, resulting in a current differential between the two drains. The current differential is proportional to the applied magnetic field component perpendicular to the current flow in the MAGFETs. The MAGFETs in the array are scanned in a raster-scan fashion. Experimental results are presented that show the array's sensitivity.<>

Published in:

Solid-State Sensor and Actuator Workshop, 1988. Technical Digest., IEEE

Date of Conference:

6-9 June 1988