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Design of a nonblocking shared-memory copy network for ATM

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2 Author(s)
Bianchini, R.P., Jr. ; Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA ; Kim, H.S.

A new nonblocking copy network is presented, for use in an ATM switch supporting BISDN, with a shared-memory input buffer. Blocked cells from any switch input are stored in a single shared input buffer. The copy network consists of three Omega networks and shared-memory queues. The design is scalable for large numbers of inputs due to a low hardware complexity, O(N log2 N), and distributed operation and control. It is shown by simulation results that a switch incorporating the shared-memory copy network has increased throughput and lower buffer requirements to maintain low packet loss probability when compared to a switch with a discrete buffer copy network

Published in:

INFOCOM '92. Eleventh Annual Joint Conference of the IEEE Computer and Communications Societies, IEEE

Date of Conference:

4-8 May 1992