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Minimally synchronized architectures: a new approach to the design of parallel architectures

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2 Author(s)
Chowdhury, M.F. ; Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA ; Manwaring, M.L.

A special class of architecture which supports parallel interpretation of abstract machine language is presented. An experimental architecture based on this design procedure is presented. A cycle-level simulator of this machine is employed to measure and analyze the performance of the architecture with synthetic benchmark programs

Published in:

Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on

Date of Conference:

14-17 May 1991