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SYNTEST: an environment for system-level design for test

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4 Author(s)
Harmanani, H. ; Dept. of Comput. Eng., Case Western Reserve Univ., Cleveland, OH, USA ; Papachristou, C. ; Chiu, S. ; Nourani, M.

The authors describe the design and implementation of SYNTEST, a system for the design of self-testable VLSI circuits from behavioral description. SYNTEST consists of several algorithmic synthesis tools for scheduling, testable allocation, and optimum test points selection. A key feature in SYNTEST is the tight interaction between the system tools: the scheduler, the allocator, and the test tool. The system uses a technology library for optimizing the original structure. All tools interact with each other as well with the user through an X graphical interface. This provides a better design environment and allows for more designer intervention

Published in:

Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European

Date of Conference:

7-10 Sep 1992

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