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Multi-kernel simulation description within VHDL

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2 Author(s)
C. Oczko ; Cadlab, Paderborn, Germany ; M. W. Nitsche

Summary form only given. The authors describe ongoing work on multikernel description facilities within VHSIC hardware description language (VHDL) which is performed in the scope of ECIP (European CAD Integration Project). The motivation, aims, and scope of the work are outlined

Published in:

Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European

Date of Conference:

7-10 Sep 1992