Referenced Items are not available for this document.
A cache consistency scheme is presented for a class of multiprocessors based on a hierarchy of rings. By taking advantage of the natural broadcast and ordering properties of rings, cache consistency is achieved via a simple, selective-broadcast based protocol requiring no complex hardware. Using address-trace driven simulations of the Hector shared-memory multiprocessor, it is shown that the scheme performs well
Published in:
Supercomputing '92., Proceedings
Date of Conference: 16-20 Nov 1992
- Page(s):
- 348 - 357
- Meeting Date :
- 16 Nov 1992-20 Nov 1992
- Print ISBN:
- 0-8186-2630-5
- INSPEC Accession Number:
- 4441755
- Conference Location :
- Minneapolis, MN
- Digital Object Identifier :
- 10.1109/SUPERC.1992.236668
- Product Type:
- Conference Publications
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