Referenced Items are not available for this document.
The switching mechanism of a direct-coupled Josephson logic gate, a four-junction logic gate, has been investigated. It was found that a high-speed input signal current is wasted in an input-output separation resistance (R/sub i/). A speedup method has been developed in which an inductance is connected to (R/sub i/) in series. The value of the inductance was found to be five times larger than the effective inductance of the input junction. A speedup of 40% in the gate switching was demonstrated by a logic delay experiment using submicron NbN-MgO-NbN junction technology. The minimum logic delay of 3.0 ps/gate was obtained with fan-out 1.<
Published in:
Applied Superconductivity, IEEE Transactions on
(Volume:3
,
Issue:
1
)
Date of Publication: March 1993
- Page(s):
- 2679 - 2682
- ISSN :
- 1051-8223
- INSPEC Accession Number:
- 4466628
- Digital Object Identifier :
- 10.1109/77.233978
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- March 1993
- Sponsored by :
- The IEEE Council on Superconductivity
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
