By Topic

Concurrent control of multiple BIT structures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Breuer, M.A. ; Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA ; Gupta, R. ; Lien, J.-C.

A generic control graph for activating common built-in test structures is derived and its microprogrammed and hardwired implementations described. Three designs for activating multiple BIT structures concurrently are also presented along with simulation results of area/test time tradeoffs. Two designs for this generic controller are presented. The first design augments the classical microprogrammed controller with some circuitry used for counting. This design is most useful when a microprogrammable controller already exists for normal control operations. The second design is a hardwire unit which efficiently implements the generic controller. A complete circuit-level implementation is described. The controller can be easily made self-testing by modifying an existing register to support signature analysis. In addition, the controller is quite simple and can be incorporated on-chip.<>

Published in:

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Date of Conference:

12-14 Sept. 1988