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Design and test of a 2-Gbit/s GaAs 16/8-bit MUX/DEMUX pair

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3 Author(s)
Cheney, B. ; TriQuint Semicond., Beaverton, OR, USA ; Hamilton, P. ; LaRue, G.

A 16/8-b multiplexer/demultiplexer (MUX/DEMUX) pair designed with a GaAs standard cell approach is presented here. The designs feature ECL compatibility and can support data rates up to 2 Gb/s. In addition to reviewing the design aspects of these devices, the development of a high-speed production test system is presented. The devices presented perform parallel/serial and serial/parallel conversion continuously (time-division multiplexing/demultiplexing) at rates up to 2 Gbs/s. A rigorous testing technique using a long pseudorandom bit steam sequence (2/sup 23/-1) and exercising all channels simultaneously is utilized.<>

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:24 ,  Issue: 2 )

Date of Publication:

April 1989

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